Re: [PATCH V12] mm/debug: Add tests validating architecture page table helpers
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- To: Gerald Schaefer <gerald.schaefer@xxxxxxxxxx>
- Subject: Re: [PATCH V12] mm/debug: Add tests validating architecture page table helpers
- From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
- Date: Thu, 13 Feb 2020 07:45:55 +0530
- Cc: Catalin Marinas <catalin.marinas@xxxxxxx>, linux-mm@xxxxxxxxx, Mark Rutland <mark.rutland@xxxxxxx>, linux-ia64@xxxxxxxxxxxxxxx, linux-sh@xxxxxxxxxxxxxxx, Peter Zijlstra <peterz@xxxxxxxxxxxxx>, James Hogan <jhogan@xxxxxxxxxx>, Tetsuo Handa <penguin-kernel@xxxxxxxxxxxxxxxxxxx>, Heiko Carstens <heiko.carstens@xxxxxxxxxx>, Michal Hocko <mhocko@xxxxxxxxxx>, Dave Hansen <dave.hansen@xxxxxxxxx>, Paul Mackerras <paulus@xxxxxxxxx>, sparclinux@xxxxxxxxxxxxxxx, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, linux-s390@xxxxxxxxxxxxxxx, Michael Ellerman <mpe@xxxxxxxxxxxxxx>, x86@xxxxxxxxxx, Russell King - ARM Linux <linux@xxxxxxxxxxxxxxx>, Matthew Wilcox <willy@xxxxxxxxxxxxx>, Steven Price <Steven.Price@xxxxxxx>, Jason Gunthorpe <jgg@xxxxxxxx>, linux-snps-arc@xxxxxxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, Ingo Molnar <mingo@xxxxxxxxxx>, Kees Cook <keescook@xxxxxxxxxxxx>, Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>, Mark Brown <broonie@xxxxxxxxxx>, "Kirill A . Shutemov" <kirill@xxxxxxxxxxxxx>, Dan Williams <dan.j.williams@xxxxxxxxx>, Vlastimil Babka <vbabka@xxxxxxx>, Christophe Leroy <christophe.leroy@xxxxxx>, Sri Krishna chowdary <schowdary@xxxxxxxxxx>, Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, linux-mips@xxxxxxxxxxxxxxx, Ralf Baechle <ralf@xxxxxxxxxxxxxx>, linux-kernel@xxxxxxxxxxxxxxx, Paul Burton <paul.burton@xxxxxxxx>, Mike Rapoport <rppt@xxxxxxxxxxxxxxxxxx>, Vineet Gupta <vgupta@xxxxxxxxxxxx>, Martin Schwidefsky <schwidefsky@xxxxxxxxxx>, Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>, linuxppc-dev@xxxxxxxxxxxxxxxx, "David S. Miller" <davem@xxxxxxxxxxxxx>
- In-reply-to: <20200212185548.3274ec2e@thinkpad>
- References: <1580174873-18117-1-git-send-email-anshuman.khandual@arm.com> <20200210153716.GB9283@E121110.arm.com> <b169ff9d-7b87-91f4-b3d0-e97f86680d0c@arm.com> <20200212185548.3274ec2e@thinkpad>
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On 02/12/2020 11:25 PM, Gerald Schaefer wrote:
> On Wed, 12 Feb 2020 15:12:54 +0530
> Anshuman Khandual <anshuman.khandual@xxxxxxx> wrote:
>
>>>> +/*
>>>> + * On s390 platform, the lower 12 bits are used to identify given page table
>>>> + * entry type and for other arch specific requirements. But these bits might
>>>> + * affect the ability to clear entries with pxx_clear(). So while loading up
>>>> + * the entries skip all lower 12 bits in order to accommodate s390 platform.
>>>> + * It does not have affect any other platform.
>>>> + */
>>>> +#define RANDOM_ORVALUE (0xfffffffffffff000UL)
>>>
>>> I'd suggest you generate this mask with something like
>>> GENMASK(BITS_PER_LONG, PAGE_SHIFT).
>>
>> IIRC the lower 12 bits constrains on s390 platform might not be really related
>> to it's PAGE_SHIFT which can be a variable, but instead just a constant number.
>> But can definitely use GENMASK or it's variants here.
>>
>> https://lkml.org/lkml/2019/9/5/862
>
> PAGE_SHIFT would be fine, it is 12 on s390. However, in order to be
> more precise, we do not really need all 12 bits, only the last 4 bits.
> So, something like this would work:
>
> #define RANDOM_ORVALUE GENMASK(BITS_PER_LONG - 1, 4)
>
> The text in the comment could then also be changed from 12 to 4, and
> be a bit more specific on the fact that the impact on pxx_clear()
> results from the dynamic page table folding logic on s390:
>
> /*
> * On s390 platform, the lower 4 bits are used to identify given page table
> * entry type. But these bits might affect the ability to clear entries with
> * pxx_clear() because of how dynamic page table folding works on s390. So
> * while loading up the entries do not change the lower 4 bits.
> * It does not have affect any other platform.
> */
Sure, will update accordingly.
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