On Mon, May 27, 2019 at 02:28:33PM +0200, Arnd Bergmann wrote: > On Mon, May 27, 2019 at 12:45 PM Christian Brauner <christian@xxxxxxxxxx> wrote: > > On Mon, May 27, 2019 at 12:02:37PM +0200, Arnd Bergmann wrote: > > > On Sun, May 26, 2019 at 12:27 PM Christian Brauner <christian@xxxxxxxxxx> wrote: > > > > > > > > Wire up the clone6() call on x86. > > > > > > > > This patch only wires up clone6() on x86. Some of the arches look like they > > > > need special assembly massaging and it is probably smarter if the > > > > appropriate arch maintainers would do the actual wiring. > > > > > > Why do some architectures need special cases here? I'd prefer to have > > > new system calls always get defined in a way that avoids this, and > > > have a common entry point for everyone. > > > > > > Looking at the m68k sys_clone comment in > > > arch/m68k/kernel/process.c, it seems that this was done as an > > > optimization to deal with an inferior ABI. Similar code is present > > > in h8300, ia64, nios2, and sparc. If all of them just do this to > > > shave off a few cycles from the system call entry, I really > > > couldn't care less. > > > > I'm happy to wire all arches up at the same time in the next revision. I > > just wasn't sure why some of them were assemblying the living hell out > > of clone; especially ia64. I really didn't want to bother touching all > > of this just for an initial RFC. > > Don't worry about doing all architectures for the RFC, I mainly want this > to be done consistently by the time it gets into linux-next. > > One thing to figure out though is whether we need the stack_size argument > that a couple of architectures pass. It's usually hardwired to zero, > but not all the time, and I don't know the history of this. Afaict, stack_size is *only* used on ia64: /* * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr, * u64 tls) */ GLOBAL_ENTRY(sys_clone2) /* * Allocate 8 input registers since ptrace() may clobber them */ .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) alloc r16=ar.pfs,8,2,6,0 DO_SAVE_SWITCH_STACK adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp mov loc0=rp mov loc1=r16 // save ar.pfs across do_fork .body mov out1=in1 mov out2=in2 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID ;; (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID mov out0=in0 // out0 = clone_flags br.call.sptk.many rp=do_fork .ret1: .restore sp adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack mov ar.pfs=loc1 mov rp=loc0 br.ret.sptk.many rp END(sys_clone2) I'm not sure if this needs to be because of architectural constraints or if it just is a historic artifact. (Ccing ia64 now to see what they have to say.) Christian
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