RE: [PATCH 02/11] x86: make dma_cache_sync a no-op
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- To: "'Christoph Hellwig'" <hch@xxxxxx>, "iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx" <iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx>
- Subject: RE: [PATCH 02/11] x86: make dma_cache_sync a no-op
- From: David Laight <David.Laight@xxxxxxxxxx>
- Date: Tue, 3 Oct 2017 16:02:10 +0000
- Accept-language: en-GB, en-US
- Cc: Chris Zankel <chris@xxxxxxxxxx>, Michal Simek <monstr@xxxxxxxxx>, "linux-ia64@xxxxxxxxxxxxxxx" <linux-ia64@xxxxxxxxxxxxxxx>, "linux-mips@xxxxxxxxxxxxxx" <linux-mips@xxxxxxxxxxxxxx>, "linux-sh@xxxxxxxxxxxxxxx" <linux-sh@xxxxxxxxxxxxxxx>, "linuxppc-dev@xxxxxxxxxxxxxxxx" <linuxppc-dev@xxxxxxxxxxxxxxxx>, "linux-xtensa@xxxxxxxxxxxxxxxx" <linux-xtensa@xxxxxxxxxxxxxxxx>, "x86@xxxxxxxxxx" <x86@xxxxxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>, David Howells <dhowells@xxxxxxxxxx>, "Max Filippov" <jcmvbkbc@xxxxxxxxx>, Guan Xuetao <gxt@xxxxxxxxxxxxxxx>, "Robin Murphy" <robin.murphy@xxxxxxx>, Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
- In-reply-to: <20171003104311.10058-3-hch@lst.de>
- References: <20171003104311.10058-1-hch@lst.de> <20171003104311.10058-3-hch@lst.de>
From: Christoph Hellwig
> Sent: 03 October 2017 11:43
> x86 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
> make any sense to do any work in dma_cache_sync given that it must be a
> no-op when dma_alloc_attrs returns coherent memory.
I believe it is just about possible to require an explicit
write flush on x86.
ISTR this can happen with something like write combining.
Whether this can actually happen is the kernel is another matter.
David
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