Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
- To: Yijing Wang <wangyijing@xxxxxxxxxx>
- Subject: Re: [PATCH v2 12/22] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq
- From: Thierry Reding <thierry.reding@xxxxxxxxx>
- Date: Thu, 25 Sep 2014 09:34:36 +0200
- Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>, linux-pci@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, Xinwei Hu <huxinwei@xxxxxxxxxx>, Wuyun <wuyun.wu@xxxxxxxxxx>, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, Russell King <linux@xxxxxxxxxxxxxxxx>, linux-arch@xxxxxxxxxxxxxxx, arnab.basu@xxxxxxxxxxxxx, Bharat.Bhushan@xxxxxxxxxxxxx, x86@xxxxxxxxxx, Arnd Bergmann <arnd@xxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx, Joerg Roedel <joro@xxxxxxxxxx>, iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx, linux-mips@xxxxxxxxxxxxxx, Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>, linuxppc-dev@xxxxxxxxxxxxxxxx, linux-s390@xxxxxxxxxxxxxxx, Sebastian Ott <sebott@xxxxxxxxxxxxxxxxxx>, Tony Luck <tony.luck@xxxxxxxxx>, linux-ia64@xxxxxxxxxxxxxxx, "David S. Miller" <davem@xxxxxxxxxxxxx>, sparclinux@xxxxxxxxxxxxxxx, Chris Metcalf <cmetcalf@xxxxxxxxxx>, Ralf Baechle <ralf@xxxxxxxxxxxxxx>, Lucas Stach <l.stach@xxxxxxxxxxxxxx>, David Vrabel <david.vrabel@xxxxxxxxxx>, Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>, Michael Ellerman <mpe@xxxxxxxxxxxxxx>, Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
- In-reply-to: <1411614872-4009-13-git-send-email-wangyijing@huawei.com>
- List-id: <linux-ia64.vger.kernel.org>
- References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-13-git-send-email-wangyijing@huawei.com>
- User-agent: Mutt/1.5.23 (2014-03-12)
On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote:
[...]
> diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
[...]
> @@ -132,12 +132,12 @@ msi_irq_allocated:
> /* Make sure the search for available interrupts didn't fail */
> if (irq >= 64) {
> if (request_private_bits) {
> - pr_err("arch_setup_msi_irq: Unable to find %d free interrupts, trying just one",
> + pr_err("octeon_setup_msi_irq: Unable to find %d free interrupts, trying just one",
> 1 << request_private_bits);
Perhaps while at it make this (and other similar changes in this patch):
pr_err("%s(): Unable to ...", __func__, ...);
So that it becomes more resilient against this kind of rename?
> request_private_bits = 0;
> goto try_only_one;
> } else
> - panic("arch_setup_msi_irq: Unable to find a free MSI interrupt");
> + panic("octeon_setup_msi_irq: Unable to find a free MSI interrupt");
> @@ -210,14 +210,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
>
> return 0;
> }
> -
This...
> @@ -240,7 +239,7 @@ void arch_teardown_msi_irq(unsigned int irq)
> */
> number_irqs = 0;
> while ((irq0 + number_irqs < 64) &&
> - (msi_multiple_irq_bitmask[index]
> + (msi_multiple_irq_bitmask[index]
... and this seem like unrelated whitespace changes.
> & (1ull << (irq0 + number_irqs))))
> number_irqs++;
> number_irqs++;
> @@ -249,8 +248,8 @@ void arch_teardown_msi_irq(unsigned int irq)
> /* Shift the mask to the correct bit location */
> bitmask <<= irq0;
> if ((msi_free_irq_bitmask[index] & bitmask) != bitmask)
> - panic("arch_teardown_msi_irq: Attempted to teardown MSI "
> - "interrupt (%d) not in use", irq);
> + panic("octeon_teardown_msi_irq: Attempted to teardown MSI "
> + "interrupt (%d) not in use", irq);
And the second line here also needlessly changes the indentation.
Thierry
Attachment:
pgp2fWj7xk425.pgp
Description: PGP signature
[Index of Archives]
[Linux Kernel]
[Sparc Linux]
[DCCP]
[Linux ARM]
[Yosemite News]
[Linux SCSI]
[Linux x86_64]
[Linux for Ham Radio]