On Tue, Oct 24, 2006 at 02:29:47PM -0700, Roland Dreier wrote: > > It is good to be conservative in this area. Some AMD chipsets at least > > had ordering problems with some configurations in the K7 era. > > Could you expand a little? Do you mean that the arch implementation > of pci_write_config_xxx() should have extra barriers, or that drivers > should do belt-and-suspenders flushes to make sure config writes are > really done properly? Drivers are -already- written to assume the pci_write_config_xxx() has the requisite barriers. The fix doesn't belong in the drivers. Jeff - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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