[patch] ar.fpsr not set on MCA/INIT kernel entry
When entering the kernel due to an MCA or INIT, ar.fpsr (ar40)
was not getting set to the kernel default value (remaining
at the user value). The effect depends on the user setting
of ar.fpsr. In the test case, the effect was addresses
printing with strange hex values.
Setting ar.fpsr in ia64_set_kernel_registers sets it for both
the MCA and INIT paths. The user value of ar.fpsr is correctly
saved (in ia64_state_save) and restored (in ia64_state_restore).
Below is an example of output with very strange hex values.
Anyone know the value of hex 'g'? :-)
-------------------------------------------------------
Entered OS INIT handler. PSP=fff2g19g cpu=11 monarch=1
Delaying for 5 seconds...
All OS INIT slaves have reached rendezvous
Processes interrupted by INIT - 0 (cpu 14 task 0xdfffg55g7a4c6gA) 0 (cpu 16 task 0xdfffg55g7a4d6gA) 0 (cpu 21 task 0xdfffg25fg3e5egA)
Backtrace of pid 1 (init)
Call Trace:
[<9ffffffgfg7328A>] schedule+0x19fg/0x1c7g
sp=dfffg45fg3ede8Aa bsp=dfffg45fg3ed7gA0
[<9ffffffgfg733gA0>] schedule_timeout+0xgg/0x17g
sp=dfffg45fg3ede8Ad bsp=dfffg45fg3ed7gA0
[<9ffffffgfg185gAp>] do_select+0x35g/0x83g
sp=dfffg45fg3ede8Ad bsp=dfffg45fg3ed7gAd
[<9ffffffgfg1868A>] sys_select+0x5gg/0x9dg
sp=dfffg45fg3ede8A [<9ffffffgfffga8A>] ia64_ret_from_syscall+0x0/0x1g
sp=dfffg45fg3ede8A0 bsp=dfffg45fg3ed7gAn
[<9ffffffffffgegAP>] __kernel_syscall_via_break+0x0/0x1g
sp=dfffg45fg3edegA bsp=dfffg45fg3ed7gAn
---------------------------------------------------------------
Signed-off-by: Russ Anderson (rja@xxxxxxx)
---
arch/ia64/kernel/mca_asm.S | 2 ++
1 file changed, 2 insertions(+)
Index: test/arch/ia64/kernel/mca_asm.S
===================================================================
--- test.orig/arch/ia64/kernel/mca_asm.S 2006-09-18 16:10:06.058062990 -0500
+++ test/arch/ia64/kernel/mca_asm.S 2006-09-18 16:10:29.628971888 -0500
@@ -1063,7 +1063,9 @@ ia64_set_kernel_registers:
;;
mov IA64_KR(CURRENT_STACK)=r16
or r21=r20,r21 // construct PA | page properties
+ movl r17=FPSR_DEFAULT
;;
+ mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value
mov cr.itir=r18
mov cr.ifa=r13
mov r20=IA64_TR_CURRENT_STACK
--
Russ Anderson, OS RAS/Partitioning Project Lead
SGI - Silicon Graphics Inc rja@xxxxxxx
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