RE: Fix ia64 bitops: Full barrier on smp_mb__after_clear_bit()
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- To: "'Christoph Lameter'" <clameter@xxxxxxx>, "Luck, Tony" <tony.luck@xxxxxxxxx>
- Subject: RE: Fix ia64 bitops: Full barrier on smp_mb__after_clear_bit()
- From: "Chen, Kenneth W" <kenneth.w.chen@xxxxxxxxx>
- Date: Fri, 31 Mar 2006 11:51:16 -0800
- Cc: <linux-ia64@xxxxxxxxxxxxxxx>, <nickpiggin@xxxxxxxxxxxx>, "Zoltan Menyhart" <Zoltan.Menyhart@xxxxxxxx>, "Boehm, Hans" <hans.boehm@xxxxxx>, "Grundler, Grant G" <grant.grundler@xxxxxx>, "David Mosberger-Tang" <David.Mosberger@xxxxxxx>
- In-reply-to: <Pine.LNX.4.64.0603311124380.7426@xxxxxxxxxxxxxxxxxxxxxxxxx>
- Thread-index: AcZU+fsLR0HiEhvQQjaGyVSFaIZJMQAAb6VQ
- Trustexchangesourcedmail: True
Christoph Lameter wrote on Friday, March 31, 2006 11:31 AM
> This is also the way that powerpc (which faces similar issues) implements
> these macros.
>
> include/asm-powerpc/bitops.h:
>
> /*
> * clear_bit doesn't imply a memory barrier
> */
> #define smp_mb__before_clear_bit() smp_mb()
> #define smp_mb__after_clear_bit() smp_mb()
Using a totally different architecture to justify a change for ia64
specific implementation is a bit strange to me. PPC has their own
architecture limitation to deal with, why mix that with ia64?
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