RE: Synchronizing Bit operations V2
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- To: "'Christoph Lameter'" <clameter@xxxxxxx>
- Subject: RE: Synchronizing Bit operations V2
- From: "Chen, Kenneth W" <kenneth.w.chen@xxxxxxxxx>
- Date: Thu, 30 Mar 2006 17:13:35 -0800
- Cc: "Nick Piggin" <nickpiggin@xxxxxxxxxxxx>, "Zoltan Menyhart" <Zoltan.Menyhart@xxxxxxxx>, "Boehm, Hans" <hans.boehm@xxxxxx>, "Grundler, Grant G" <grant.grundler@xxxxxx>, <akpm@xxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>, <linux-ia64@xxxxxxxxxxxxxxx>
- In-reply-to: <Pine.LNX.4.64.0603301707300.2553@xxxxxxxxxxxxxxxxxxxxxxxxx>
- Thread-index: AcZUX97hQI02AVNuRMGqurYY24wRCQAADY8g
Christoph Lameter wrote on Thursday, March 30, 2006 5:09 PM
> In general yes the caller should not be thinking about clear_bit having
> any memory ordering at all. However for IA64 arch specific code the bit
> operations must have a certain ordering semantic and it would be best that
> these are also consistent. clear_bit is not a lock operation and may
> f.e. be used for locking something.
OK, fine. Then please don't change smp_mb__after_clear_bit() for ia64.
i.e., leave it alone as noop.
- Ken
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