Christoph Lameter wrote on Thursday, March 30, 2006 4:43 PM > > > Note that the current semantics for bitops IA64 are broken. Both > > > smp_mb__after/before_clear_bit are now set to full memory barriers > > > to compensate > > > > Why you say that? clear_bit has built-in acq or rel semantic depends > > on how you define it. I think only one of smp_mb__after/before need to > > be smp_mb? > > clear_bit has no barrier semantics just acquire. Therefore both smp_mb_* > need to be barriers or they need to add some form of "release". We are talking about arch specific implementation of clear_bit and smp_mb_*. Yes, for generic code, clear_bit has no implication of memory ordering, but for arch specific code, one should optimize those three functions with the architecture knowledge of exactly what's happening under the hood. - Ken - : send the line "unsubscribe linux-ia64" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
|