On Tue, 28 Mar 2006, Zoltan Menyhart wrote: > Why not to use separate bit operations for different purposes? > > - e.g. "test_and_set_bit_N_acquire()" for lock acquisition > - "test_and_set_bit()", "clear_bit()" as they are today > - "release_N_clear_bit()"... > That would force IA64 specifics onto all other architectures. Could we simply define these smb_mb__*_clear_bit to be noops and then make the atomic bit ops to have full barriers? That would satisfy Nick's objections. Index: linux-2.6.16/include/asm-ia64/bitops.h =================================================================== --- linux-2.6.16.orig/include/asm-ia64/bitops.h 2006-03-19 21:53:29.000000000 -0800 +++ linux-2.6.16/include/asm-ia64/bitops.h 2006-03-28 15:45:08.000000000 -0800 @@ -45,6 +45,7 @@ old = *m; new = old | bit; } while (cmpxchg_acq(m, old, new) != old); + smb_mb(); } /** @@ -65,7 +66,7 @@ /* * clear_bit() has "acquire" semantics. */ -#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__before_clear_bit() do { } while (0) #define smp_mb__after_clear_bit() do { /* skip */; } while (0) /** @@ -92,6 +93,7 @@ old = *m; new = old & mask; } while (cmpxchg_acq(m, old, new) != old); + smp_mb(); } /** @@ -128,6 +130,7 @@ old = *m; new = old ^ bit; } while (cmpxchg_acq(m, old, new) != old); + smp_mb(); } /** @@ -167,6 +170,7 @@ old = *m; new = old | bit; } while (cmpxchg_acq(m, old, new) != old); + smp_mb(); return (old & bit) != 0; } @@ -212,6 +216,7 @@ old = *m; new = old & mask; } while (cmpxchg_acq(m, old, new) != old); + smp_mb(); return (old & ~mask) != 0; } @@ -257,6 +262,7 @@ old = *m; new = old ^ bit; } while (cmpxchg_acq(m, old, new) != old); + smp_mb(); return (old & bit) != 0; } - : send the line "unsubscribe linux-ia64" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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