Re: [PATCH 3/3] i2c: amd-asf: Clear remote IRR bit to get successive interrupt

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Hi Shyam,

On Mon, Feb 17, 2025 at 02:32:58PM +0530, Shyam Sundar S K wrote:
> In order to get the successive interrupts after receiving MCTP packet,
> it is necessary to clear the remote IRR bit by writing the interrupt
> number to the EOI register.
> 
> Fixes: b1f8921dfbaa ("i2c: amd-asf: Clear remote IRR bit to get successive interrupt")

how is the current patch fix the one above?

Can it be:

Fixes: 9b25419ad397 ("i2c: amd-asf: Add routine to handle the ASF slave process")
Cc: <stable@xxxxxxxxxxxxxxx> # v6.13+

?

If that's the case, please resend just this patch and don't
forget to Cc the stable kernel.

Thanks,
Andi

> Co-developed-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@xxxxxxx>
> ---
>  drivers/i2c/busses/i2c-amd-asf-plat.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/i2c/busses/i2c-amd-asf-plat.c b/drivers/i2c/busses/i2c-amd-asf-plat.c
> index 438db5a9d0ed..ca45f0f23321 100644
> --- a/drivers/i2c/busses/i2c-amd-asf-plat.c
> +++ b/drivers/i2c/busses/i2c-amd-asf-plat.c
> @@ -293,6 +293,7 @@ static irqreturn_t amd_asf_irq_handler(int irq, void *ptr)
>  		amd_asf_update_ioport_target(piix4_smba, ASF_SLV_INTR, SMBHSTSTS, true);
>  	}
>  
> +	iowrite32(irq, dev->eoi_base);
>  	return IRQ_HANDLED;
>  }
>  
> -- 
> 2.34.1
> 




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