Hi Kartik, kernel test robot noticed the following build warnings: [auto build test WARNING on tegra/for-next] [also build test WARNING on andi-shyti/i2c/i2c-host robh/for-next linus/master v6.13-rc6 next-20250109] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Kartik-Rajput/i2c-tegra-Add-HS-mode-support/20250108-190816 base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next patch link: https://lore.kernel.org/r/20250108110620.86900-2-kkartik%40nvidia.com patch subject: [PATCH 1/5] i2c: tegra: Add HS mode support config: arm-randconfig-001-20250109 (https://download.01.org/0day-ci/archive/20250109/202501091951.yESb0LaA-lkp@xxxxxxxxx/config) compiler: arm-linux-gnueabi-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250109/202501091951.yESb0LaA-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202501091951.yESb0LaA-lkp@xxxxxxxxx/ All warnings (new ones prefixed by >>): >> drivers/i2c/busses/i2c-tegra.c:231: warning: Function parameter or struct member 'tlow_hs_mode' not described in 'tegra_i2c_hw_feature' >> drivers/i2c/busses/i2c-tegra.c:231: warning: Function parameter or struct member 'thigh_hs_mode' not described in 'tegra_i2c_hw_feature' >> drivers/i2c/busses/i2c-tegra.c:231: warning: Function parameter or struct member 'has_hs_mode_support' not described in 'tegra_i2c_hw_feature' drivers/i2c/busses/i2c-tegra.c:301: warning: Function parameter or struct member 'dma_dev' not described in 'tegra_i2c_dev' vim +231 drivers/i2c/busses/i2c-tegra.c db811ca0f48578 Colin Cross 2011-02-20 163 6ad068ed63100f Laxman Dewangan 2012-08-19 164 /** 94a5573f0719cf Dmitry Osipenko 2020-09-30 165 * struct tegra_i2c_hw_feature : per hardware generation features 94a5573f0719cf Dmitry Osipenko 2020-09-30 166 * @has_continue_xfer_support: continue-transfer supported 2a2897bab2d3d5 Laxman Dewangan 2013-01-05 167 * @has_per_pkt_xfer_complete_irq: Has enable/disable capability for transfer 94a5573f0719cf Dmitry Osipenko 2020-09-30 168 * completion interrupt on per packet basis. 6f4664b2e2c2cf Laxman Dewangan 2015-06-30 169 * @has_config_load_reg: Has the config load register to load the new 6f4664b2e2c2cf Laxman Dewangan 2015-06-30 170 * configuration. 2a2897bab2d3d5 Laxman Dewangan 2013-01-05 171 * @clk_divisor_hs_mode: Clock divisor in HS mode. 0940d24912e925 Sowjanya Komatineni 2019-02-12 172 * @clk_divisor_std_mode: Clock divisor in standard mode. It is 0940d24912e925 Sowjanya Komatineni 2019-02-12 173 * applicable if there is no fast clock source i.e. single clock 0940d24912e925 Sowjanya Komatineni 2019-02-12 174 * source. 0940d24912e925 Sowjanya Komatineni 2019-02-12 175 * @clk_divisor_fast_mode: Clock divisor in fast mode. It is 2a2897bab2d3d5 Laxman Dewangan 2013-01-05 176 * applicable if there is no fast clock source i.e. single clock 2a2897bab2d3d5 Laxman Dewangan 2013-01-05 177 * source. 0604ee4aefa20f Thierry Reding 2018-12-17 178 * @clk_divisor_fast_plus_mode: Clock divisor in fast mode plus. It is 0604ee4aefa20f Thierry Reding 2018-12-17 179 * applicable if there is no fast clock source (i.e. single 0604ee4aefa20f Thierry Reding 2018-12-17 180 * clock source). 0604ee4aefa20f Thierry Reding 2018-12-17 181 * @has_multi_master_mode: The I2C controller supports running in single-master 0604ee4aefa20f Thierry Reding 2018-12-17 182 * or multi-master mode. 0604ee4aefa20f Thierry Reding 2018-12-17 183 * @has_slcg_override_reg: The I2C controller supports a register that 0604ee4aefa20f Thierry Reding 2018-12-17 184 * overrides the second level clock gating. 0604ee4aefa20f Thierry Reding 2018-12-17 185 * @has_mst_fifo: The I2C controller contains the new MST FIFO interface that 0604ee4aefa20f Thierry Reding 2018-12-17 186 * provides additional features and allows for longer messages to 0604ee4aefa20f Thierry Reding 2018-12-17 187 * be transferred in one go. 94a5573f0719cf Dmitry Osipenko 2020-09-30 188 * @quirks: I2C adapter quirks for limiting write/read transfer size and not b67d4530cdade7 Sowjanya Komatineni 2019-01-08 189 * allowing 0 length transfers. ce9562424501de Sowjanya Komatineni 2019-02-12 190 * @supports_bus_clear: Bus Clear support to recover from bus hang during ce9562424501de Sowjanya Komatineni 2019-02-12 191 * SDA stuck low from device for some unknown reasons. 86c92b9965ff17 Sowjanya Komatineni 2019-02-12 192 * @has_apb_dma: Support of APBDMA on corresponding Tegra chip. 0940d24912e925 Sowjanya Komatineni 2019-02-12 193 * @tlow_std_mode: Low period of the clock in standard mode. 0940d24912e925 Sowjanya Komatineni 2019-02-12 194 * @thigh_std_mode: High period of the clock in standard mode. 0940d24912e925 Sowjanya Komatineni 2019-02-12 195 * @tlow_fast_fastplus_mode: Low period of the clock in fast/fast-plus modes. 0940d24912e925 Sowjanya Komatineni 2019-02-12 196 * @thigh_fast_fastplus_mode: High period of the clock in fast/fast-plus modes. 0940d24912e925 Sowjanya Komatineni 2019-02-12 197 * @setup_hold_time_std_mode: Setup and hold time for start and stop conditions 0940d24912e925 Sowjanya Komatineni 2019-02-12 198 * in standard mode. 0940d24912e925 Sowjanya Komatineni 2019-02-12 199 * @setup_hold_time_fast_fast_plus_mode: Setup and hold time for start and stop 0940d24912e925 Sowjanya Komatineni 2019-02-12 200 * conditions in fast/fast-plus modes. 0940d24912e925 Sowjanya Komatineni 2019-02-12 201 * @setup_hold_time_hs_mode: Setup and hold time for start and stop conditions 0940d24912e925 Sowjanya Komatineni 2019-02-12 202 * in HS mode. 0940d24912e925 Sowjanya Komatineni 2019-02-12 203 * @has_interface_timing_reg: Has interface timing register to program the tuned 0940d24912e925 Sowjanya Komatineni 2019-02-12 204 * timing settings. 6ad068ed63100f Laxman Dewangan 2012-08-19 205 */ 6ad068ed63100f Laxman Dewangan 2012-08-19 206 struct tegra_i2c_hw_feature { 6ad068ed63100f Laxman Dewangan 2012-08-19 207 bool has_continue_xfer_support; 2a2897bab2d3d5 Laxman Dewangan 2013-01-05 208 bool has_per_pkt_xfer_complete_irq; 6f4664b2e2c2cf Laxman Dewangan 2015-06-30 209 bool has_config_load_reg; f1c2ff98065dce Dmitry Osipenko 2020-09-30 210 u32 clk_divisor_hs_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 211 u32 clk_divisor_std_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 212 u32 clk_divisor_fast_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 213 u32 clk_divisor_fast_plus_mode; 497fbe24987bd2 Shardar Shariff Md 2016-03-14 214 bool has_multi_master_mode; 497fbe24987bd2 Shardar Shariff Md 2016-03-14 215 bool has_slcg_override_reg; c5907c6b96f187 Thierry Reding 2018-06-19 216 bool has_mst_fifo; b67d4530cdade7 Sowjanya Komatineni 2019-01-08 217 const struct i2c_adapter_quirks *quirks; ce9562424501de Sowjanya Komatineni 2019-02-12 218 bool supports_bus_clear; 86c92b9965ff17 Sowjanya Komatineni 2019-02-12 219 bool has_apb_dma; f1c2ff98065dce Dmitry Osipenko 2020-09-30 220 u32 tlow_std_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 221 u32 thigh_std_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 222 u32 tlow_fast_fastplus_mode; f1c2ff98065dce Dmitry Osipenko 2020-09-30 223 u32 thigh_fast_fastplus_mode; 19a765ab587022 Akhil R 2025-01-08 224 u32 tlow_hs_mode; 19a765ab587022 Akhil R 2025-01-08 225 u32 thigh_hs_mode; 0940d24912e925 Sowjanya Komatineni 2019-02-12 226 u32 setup_hold_time_std_mode; 0940d24912e925 Sowjanya Komatineni 2019-02-12 227 u32 setup_hold_time_fast_fast_plus_mode; 0940d24912e925 Sowjanya Komatineni 2019-02-12 228 u32 setup_hold_time_hs_mode; 0940d24912e925 Sowjanya Komatineni 2019-02-12 229 bool has_interface_timing_reg; 19a765ab587022 Akhil R 2025-01-08 230 bool has_hs_mode_support; 6ad068ed63100f Laxman Dewangan 2012-08-19 @231 }; 6ad068ed63100f Laxman Dewangan 2012-08-19 232 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
