Hi Wolfram, On Fri, Dec 20, 2024 at 9:16 PM Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote: > > On Wed, Dec 18, 2024 at 12:16:18AM +0000, Prabhakar wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Implement bus recovery by reinitializing the hardware to reset the bus > > state and generating 9 clock cycles (and a stop condition) to release > > the SDA line. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > I need to ask a high level question first: why don't you use the general > scl_recovery algorithm? We have stuff like get/set_scl/sda as well as > (un)prepare_recovery. Won't that do? > On the RZ/G2L and RZ/G3S there is a restriction for forcing the SDA/SCL states: ● Write: 0: Changes the RIICnSCL/RIICnSDA pin output to a low level. 1: Changes the RIICnSCL/RIICnSDA pin in a high-impedance state. (High level output is achieved through an external pull-up resistor.) So using the generic algorithm may be platform dependent as it would only work on platforms which have external pull-up resistor on SDA/SCL pins. So to overcome this and make recovery possible on the platforms I choose the RIIC feature to output clock cycles as required. Cheers, Prabhakar
