On Mon, Dec 02, 2024 at 03:27:11PM +0100, Konrad Dybcio wrote:
> On 19.11.2024 2:10 PM, Bryan O'Donoghue wrote:
> > Add the CAMCC block for x1e80100. The x1e80100 CAMCC block is an iteration
> > of previous CAMCC blocks with the exception of having two required
> > power-domains not just one.
> >
> > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> > index c18b99765c25c901b3d0a3fbaddc320c0a8c1716..5119cf64b461eb517e9306869ad0ec1b2cae629e 100644
> > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> > @@ -3,6 +3,7 @@
> > * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
> > */
> >
> > +#include <dt-bindings/clock/qcom,x1e80100-camcc.h>
> > #include <dt-bindings/clock/qcom,rpmh.h>
> > #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
> > #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
> > @@ -4647,6 +4648,22 @@ usb_1_ss1_dwc3_ss: endpoint {
> > };
> > };
> >
> > + camcc: clock-controller@ade0000 {
> > + compatible = "qcom,x1e80100-camcc";
> > + reg = <0 0x0ade0000 0 0x20000>;
> > + clocks = <&gcc GCC_CAMERA_AHB_CLK>,
>
> This clock is not registered with the CCF
Isn't that be going to be handled by the CCF on its own (like orphans,
etc)?
--
With best wishes
Dmitry
