On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > From: Tyrone Ting <kfting@xxxxxxxxxxx> > > Store the client address earlier since it might get called in > the i2c_recover_bus() logic flow at the early stage of > npcm_i2c_master_xfer(). ... > + /* > + * Previously, the address was stored w/o left-shift by one bit and > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > + * > + * Since there are cases that the i2c_recover_bus() gets called at the > + * early stage of npcm_i2c_master_xfer(), the address is stored with > + * the shift and used in the i2c_recover_bus(). > + * > + * The address is stored from bit 1 to bit 7 in the register for > + * sending the i2c address later so it's left-shifted by 1 bit. > + */ I would rephrase it a bit like /* * Previously, the 7-bit address was stored and being converted to * the address of event in the following call to npcm_i2c_master_start_xmit(). * * Since there are cases that the i2c_recover_bus() gets called at the * early stage of npcm_i2c_master_xfer(), the address of event is stored * and then used in the i2c_recover_bus(). */ (E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage and may be dropped completely.) > + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); ... > + /* > + * Since the transfer might be a read operation, remove the I2C_M_RD flag > + * from the bus->dest_addr for the i2c_recover_bus() call later. > + * > + * The i2c_recover_bus() uses the address in a write direction to recover > + * the i2c bus if some error condition occurs. > + */ > + if (bus->dest_addr & I2C_M_RD) Redundant. > + bus->dest_addr &= ~I2C_M_RD; -- With Best Regards, Andy Shevchenko
