Hi Andy: Thank you for your comments. After a second thought, I'll explain why slave_addr << 1 is given here. Tyrone Ting <warp5tw@xxxxxxxxx> 於 2024年10月4日 週五 上午9:49寫道： > > Hi Andy: > > Thank you for your comments and they'll be addressed. > > Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> 於 2024年10月1日 週二 下午9:17寫道： > > > > On Tue, Oct 01, 2024 at 02:28:53PM +0800, Tyrone Ting wrote: > > > From: Tyrone Ting <kfting@xxxxxxxxxxx> > > > > > > Store the client address earlier since it might get called in > > > the i2c_recover_bus() logic flow at the early stage of > > > npcm_i2c_master_xfer(). > > > > ... > > > > > + /* > > > + * Previously, the address was stored w/o left-shift by one bit and > > > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > > > + * > > > + * Since there are cases that the i2c_recover_bus() gets called at the > > > + * early stage of npcm_i2c_master_xfer(), the address is stored with > > > + * the shift and used in the i2c_recover_bus(). > > > + * > > > + * The address is stored from bit 1 to bit 7 in the register for > > > + * sending the i2c address later so it's left-shifted by 1 bit. > > > + */ > > > + bus->dest_addr = slave_addr << 1; > > > > I'm wondering if it's better to use i2c_8bit_addr_from_msg() here? > > The current implementation of i2c_8bit_addr_from_msg() (ref link: https://github.com/torvalds/linux/blob/master/include/linux/i2c.h#L947) is "return (msg->addr << 1) | (msg->flags & I2C_M_RD);" and it takes extra consideration about the read flag when retrieving the i2c address. IOW, if there is a read event, the i2c address contains a read indication (bit 0 of the i2c address is 1). The patch code "bus->dest_addr = slave_addr << 1;" might get used in i2c_recover_bus() later. (ref link: https://github.com/torvalds/linux/blob/master/drivers/i2c/busses/i2c-npcm7xx.c#L1691) Suppose there is a read event and the i2c address is 0x60. With i2c_8bit_addr_from_msg(), bus->dest_addr will be 0xc1. With the original patch, bus->dest_addr will be 0xc0. If some error condition occurs and it requires i2c_recover_bus() to recover the bus, according to the description at https://github.com/torvalds/linux/blob/master/drivers/i2c/busses/i2c-npcm7xx.c#L1742, the address "0xc1" is used as a parameter to npcm_i2c_wr_byte() which is used to send the address in the write direction. If i2c_8bit_addr_from_msg() is applied, it might not fit the scenario described at https://github.com/torvalds/linux/blob/master/drivers/i2c/busses/i2c-npcm7xx.c#L1742, which is about to send an address in a write direction since the address from i2c_8bit_addr_from_msg() contains a read indication. > > -- > > With Best Regards, > > Andy Shevchenko > > > > > > Have a nice day. > > Regards, > Tyrone Thank you. Regards, Tyrone
