Re: [PATCH v6 7/8] i2c: amd-asf: Clear remote IRR bit to get successive interrupt

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On Thu, Sep 19, 2024 at 11:29:12PM +0530, Shyam Sundar S K wrote:
> To ensure successive interrupts upon packet reception, it is necessary to
> clear the remote IRR bit by writing the interrupt number to the EOI
> register. The base address for this operation is provided by the BIOS and
> retrieved by the driver by traversing the ASF object's namespace.

...

> +	/*
> +	 * The resource obtained via ACPI might not belong to the ASF device address space. Instead,
> +	 * it could be within other IP blocks of the ASIC, which are crucial for generating
> +	 * subsequent interrupts. Therefore, we avoid using devm_platform_ioremap_resource() and

> +	 * instead use platform_get_resource() and devm_ioremap() separately to prevent any address

s/instead//

> +	 * space conflicts.
> +	 */
> +	eoi_addr = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!eoi_addr)
> +		return dev_err_probe(&pdev->dev, -EINVAL, "missing MEM resources\n");
> +
> +	asf_dev->eoi_base = devm_ioremap(&pdev->dev, eoi_addr->start, resource_size(eoi_addr));
> +	if (!asf_dev->eoi_base)
> +		return dev_err_probe(&pdev->dev, -EBUSY, "failed mapping IO region\n");

...

With the above change being applied,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>

-- 
With Best Regards,
Andy Shevchenko






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