It was observed issuing ABORT bit(IC_ENABLE[1]) will not work when IC_ENABLE is already disabled. Check if ENABLE bit(IC_ENABLE[0]) is disabled when the master is holding SCL low. If ENABLE bit is disabled, the software need enable it before trying to issue ABORT bit. otherwise, the controller ignores any write to ABORT bit. Signed-off-by: Kimriver Liu <kimriver.liu@xxxxxxxxxxxx> --- V6->V7: 1. add Subject versioning [PATCH v7] 2. change fsleep(25) to usleep_range(25, 250) 3. Add macro definition DW_iC_ENABLE_ENABLE to fix compile errors 4. base: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=master V5->V6: restore i2c_dw_is_master_idling() function checking V4->V5: delete master idling checking V3->V4: 1. update commit messages and add patch version and changelog 2. move print the error message in i2c_dw_xfer V2->V3: change (!enable) to (!(enable & DW_IC_ENABLE_ENABLE)) V1->V2: used standard words in function names and addressed review comments link to V1: https://lore.kernel.org/lkml/20240904064224.2394-1-kimriver.liu@xxxxxxxxxxxx/ --- drivers/i2c/busses/i2c-designware-common.c | 12 ++++++++++++ drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-master.c | 22 ++++++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c index e8a688d04aee..a105fd1e6b29 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -453,6 +453,18 @@ void __i2c_dw_disable(struct dw_i2c_dev *dev) abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD; if (abort_needed) { + if (!(enable & DW_IC_ENABLE_ENABLE)) { + regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE); + enable |= DW_IC_ENABLE_ENABLE; + /* + * Need two ic_clk delay when enabling the I2C to ensure ENABLE bit + * is already set. Wait 10 times the signaling period of the highest + * I2C transfer supported by the driver(for 400KHz this is 25us) + * as described in the DesignWare I2C databook. + */ + usleep_range(25, 250); + } + regmap_write(dev->map, DW_IC_ENABLE, enable | DW_IC_ENABLE_ABORT); ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable, !(enable & DW_IC_ENABLE_ABORT), 10, diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index e9606c00b8d1..e45daedad967 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -109,6 +109,7 @@ DW_IC_INTR_RX_UNDER | \ DW_IC_INTR_RD_REQ) +#define DW_IC_ENABLE_ENABLE BIT(0) #define DW_IC_ENABLE_ABORT BIT(1) #define DW_IC_STATUS_ACTIVITY BIT(0) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c index c7e56002809a..132b7237c004 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -253,6 +253,19 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) __i2c_dw_write_intr_mask(dev, DW_IC_INTR_MASTER_MASK); } +static bool i2c_dw_is_master_idling(struct dw_i2c_dev *dev) +{ + u32 status; + + regmap_read(dev->map, DW_IC_STATUS, &status); + if (!(status & DW_IC_STATUS_MASTER_ACTIVITY)) + return true; + + return !regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status, + !(status & DW_IC_STATUS_MASTER_ACTIVITY), + 1100, 20000); +} + static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev) { u32 val; @@ -788,6 +801,15 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) goto done; } + /* + * This happens rarely and is hard to reproduce. Debug trace + * showed that IC_STATUS had value of 0x23 when STOP_DET occurred, + * if disable IC_ENABLE.ENABLE immediately that can result in + * IC_RAW_INTR_STAT.MASTER_ON_HOLD holding SCL low. + */ + if (!i2c_dw_is_master_idling(dev)) + dev_err(dev->dev, "I2C master not idling\n"); + /* * We must disable the adapter before returning and signaling the end * of the current transfer. Otherwise the hardware might continue -- 2.17.1
