On 21.06.2024 17:37, Biju Das wrote:
>
>
>> -----Original Message-----
>> From: claudiu beznea <claudiu.beznea@xxxxxxxxx>
>> Sent: Friday, June 21, 2024 3:31 PM
>> To: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>; Chris Brandt <Chris.Brandt@xxxxxxxxxxx>;
>> andi.shyti@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
>> geert+renesas@xxxxxxxxx; magnus.damm@xxxxxxxxx; mturquette@xxxxxxxxxxxx; sboyd@xxxxxxxxxx;
>> p.zabel@xxxxxxxxxxxxxx; wsa+renesas@xxxxxxxxxxxxxxxxxxxx
>> Cc: linux-renesas-soc@xxxxxxxxxxxxxxx; linux-i2c@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
>> linux-kernel@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; Claudiu Beznea
>> <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>> Subject: Re: [PATCH 08/12] dt-bindings: i2c: renesas,riic: Document the R9A08G045 support
>>
>>
>>
>> On 21.06.2024 17:06, Biju Das wrote:
>>> Hi Claudiu,
>>>
>>>> -----Original Message-----
>>>> From: claudiu beznea <claudiu.beznea@xxxxxxxxx>
>>>> Sent: Friday, June 21, 2024 2:30 PM
>>>> Subject: Re: [PATCH 08/12] dt-bindings: i2c: renesas,riic: Document
>>>> the R9A08G045 support
>>>>
>>>>
>>>>
>>>> On 21.06.2024 16:10, Biju Das wrote:
>>>>>
>>>>>
>>>>>> -----Original Message-----
>>>>>> From: claudiu beznea <claudiu.beznea@xxxxxxxxx>
>>>>>> Sent: Friday, June 21, 2024 2:06 PM
>>>>> Subject: Re: [PATCH 08/12] dt-bindings: i2c: renesas,riic: Document
>>>>> the R9A08G045 support
>>>>>>
>>>>>>
>>>>>>
>>>>>> On 21.06.2024 15:56, Biju Das wrote:
>>>>>>>
>>>>>>> Hi claudiu,
>>>>>>>
>>>>>>>> -----Original Message-----
>>>>>>>> From: claudiu beznea <claudiu.beznea@xxxxxxxxx>
>>>>>>>> Sent: Friday, June 21, 2024 1:55 PM
>>>>>>>> Subject: Re: [PATCH 08/12] dt-bindings: i2c: renesas,riic:
>>>>>>>> Document the R9A08G045 support
>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>> On 21.06.2024 15:34, Biju Das wrote:
>>>>>>>>> Hi Claudiu,
>>>>>>>>>
>>>>>>>>>> -----Original Message-----
>>>>>>>>>> From: Claudiu <claudiu.beznea@xxxxxxxxx>
>>>>>>>>>> Sent: Friday, June 21, 2024 12:23 PM
>>>>>>>>>> Subject: [PATCH 08/12] dt-bindings: i2c: renesas,riic: Document
>>>>>>>>>> the
>>>>>>>>>> R9A08G045 support
>>>>>>>>>>
>>>>>>>>>> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>>>>>>>>>>
>>>>>>>>>> Document the Renesas RZ/G3S (R9A08G045) RIIC IP. This is
>>>>>>>>>> compatible with the version available on Renesas RZ/V2H
>>>>>>>>>> (R9A09G075). Most of the IP variants that the RIIC driver is
>>>>>>>>>> working with supports fast mode
>>>> plus.
>>>>>>>>>> However, it happens that on the same SoC to have IP
>>>>>>>>>> instatiations that support fast mode plus as well as IP
>>>>>>>>>> instantiation that doesn't support it. For this, introduced the renesas,riic-no-fast-
>> mode-plus property.
>>>>>>>>>>
>>>>>>>>>> Signed-off-by: Claudiu Beznea
>>>>>>>>>> <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>>>>>>>>>> ---
>>>>>>>>>> Documentation/devicetree/bindings/i2c/renesas,riic.yaml | 8
>>>>>>>>>> ++++++++
>>>>>>>>>> 1 file changed, 8 insertions(+)
>>>>>>>>>>
>>>>>>>>>> diff --git
>>>>>>>>>> a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
>>>>>>>>>> b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
>>>>>>>>>> index 91ecf17b7a81..c0964edbca69 100644
>>>>>>>>>> --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
>>>>>>>>>> +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
>>>>>>>>>> @@ -25,6 +25,10 @@ properties:
>>>>>>>>>> - renesas,riic-r9a07g054 # RZ/V2L
>>>>>>>>>> - const: renesas,riic-rz # RZ/A or RZ/G2L
>>>>>>>>>>
>>>>>>>>>> + - items:
>>>>>>>>>> + - const: renesas,riic-r9a08g045 # RZ/G3S
>>>>>>>>>> + - const: renesas,riic-r9a09g057
>>>>>>>>>> +
>>>>>>>>>> - const: renesas,riic-r9a09g057 # RZ/V2H(P)
>>>>>>>>>>
>>>>>>>>>> reg:
>>>>>>>>>> @@ -66,6 +70,10 @@ properties:
>>>>>>>>>> resets:
>>>>>>>>>> maxItems: 1
>>>>>>>>>>
>>>>>>>>>> + renesas,riic-no-fast-mode-plus:
>>>>>>>>>> + description: specifies if fast mode plus is not supported
>>>>>>>>>> + type: Boolean
>>>>>>>>>
>>>>>>>>> Can't this info, as part of device data?? Based on frequency and
>>>>>>>>> device data is enough to derive this info??
>>>>>>>>
>>>>>>>> We can't rely completely on device data because on RZ/G3S we have
>>>>>>>> 2 RIIC channels that support fast mode plus and 2 that doesn't support it.
>>>>>>>
>>>>>>> Can't array of bits for this channels won't help??
>>>>>>
>>>>>> Can you give an example? I'm not sure I understand how you would
>>>>>> prefer me to use the array of bits.
>>>>>
>>>>> struct riic_of_data {
>>>>> u8 regs[RIIC_REG_END];
>>>>> u16 fast_mode_info info; /* 1 means fast mode plus supported,
>>>>> starting with channel 0*/ };
>>>>>
>>>>> .info = 0x3, means channel 0 and 1 has fast mode plus supported
>>>>> .info = 0x0, none of the channel supported fast mode plus.
>>>>
>>>> If I understand the proposal correctly, a match b/w struct
>>>> riic_of_data::info bit + frequency and the nodes in device tree is
>>>> still needed, right? As the RZ/G3S RIIC channels are using the same compatible.
>>>> W/o a match how I cannot detect in the driver who is, e.g., channel 1
>>>> that supports FMP w/o hardcoding some RIIC channel data in the driver (e.g. RIIC channel
>> address)?
>>>
>>> bit array gives the capability info on various channels.
>>>
>>> If someone define fast_mode_plus frequency in DT node and channel is
>>> not fast_mode_plus(from the capability info) then you should return error.
>>>
>>> Here you need to use SoC specific compatible as each SoC has different capabilities.
>>
>> And I would add, as it is in this case: there are multiple instantiation of the RIIC in RZ/G3S SoC.
>> RIIC 0 and 1 supports FMP, RIIC 2 and 3 does not.
>>
>> For all RIICs (0, 1, 2, 3) we use the same compatible (as all are part of the same SoC). How to do
>> the match b/w DT RIIC channel and driver with the solution you propose w/o hardcoding some RIIC
>> channel data in the driver?
>
> .info =0x3, so you know from the capability, for this soc, bus 0 and 1 supports FMP.
I understand this part. What I don't understand is: when probing the driver
for, e.g., bus 0, how do I know I probe the driver for bus 0? compatible is
the same for all buses.
>
> Cheers,
> Biju
>
>
>>
>>>
>>> Cheers,
>>> Biju
>>>
>>>
>>>>
>>>> Also, for future SoCs that will suffer the same symptom but for
>>>> different channels (and channels with different addresses) the driver
>>>> will have to be adapted to match b/w the channel bit in struct riic_of_data::info and channel
>> node from DT.
>>>>
>>>>>
>>>>> Cheers,
>>>>> Biju
