On Tue, Feb 27, 2024 at 02:36:31PM +0800, Hans Hu wrote:
> During each byte access, the host performs clock stretching.
>
> To reduce the host performs clock stretching, move most of
> the per-msg processing to the interrupt context.
>
> Signed-off-by: Hans Hu <hanshu-oc@xxxxxxxxxxx>
I don't have the HW, so I can't review on register level. From a high
level point of view, it matches my suggestion and looks good (one nit):
Suggested-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Reviewed-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> + val = readw(base + VIAI2C_REG_CSR);
> + if (val & VIAI2C_CSR_RCV_NOT_ACK) {
> + dev_dbg_ratelimited(i2c->dev, "write RCV NACK error\n");
Even as a debug message, I think this should go. If NACK really is a
problem depends on the client, so the error and messaging should not be
handled at bus level.
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