In my tests terminating a transaction took about 25ms, what is in line with the chip-internal timeout as described in 5.21.3.2 "Bus Time Out" in [0]. Therefore the 2ms delay is too low. Instead of a fixed delay let's use i801_wait_intr() here, this also facilitates the status handling. This potential issue seems to have been existing forever, but as no related problem is known, treat it as an improvement. [0] Intel document #326776-003, 7 Series PCH datasheet Signed-off-by: Heiner Kallweit <hkallweit1@xxxxxxxxx> --- drivers/i2c/busses/i2c-i801.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 751b7c6d2..5a84eb1a6 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -435,12 +435,11 @@ static int i801_check_post(struct i801_priv *priv, int status) pci_err(priv->pci_dev, "Timeout, terminating transaction\n"); /* try to stop the current command */ outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv)); - usleep_range(1000, 2000); + status = i801_wait_intr(priv); outb_p(0, SMBHSTCNT(priv)); /* Check if it worked */ - status = inb_p(SMBHSTSTS(priv)); - if ((status & SMBHSTSTS_HOST_BUSY) || !(status & SMBHSTSTS_FAILED)) + if (status < 0 || !(status & SMBHSTSTS_FAILED)) pci_err(priv->pci_dev, "Failed terminating the transaction\n"); return -ETIMEDOUT; } -- 2.43.0
