Hi Piyush, On Tue, Feb 06, 2024 at 03:43:46AM -0800, Piyush Malgujar wrote: > From: Suneel Garapati <sgarapati@xxxxxxxxxxx> > > Handle changes to clock divisor logic for OcteonTX2 SoC family using > subsystem ID and using default reference clock source as 100MHz. > > Signed-off-by: Suneel Garapati <sgarapati@xxxxxxxxxxx> > Signed-off-by: Piyush Malgujar <pmalgujar@xxxxxxxxxxx> > Acked-by: Andi Shyti <andi.shyti@xxxxxxxxxx> > --- > MAINTAINERS | 1 + > drivers/i2c/busses/i2c-octeon-core.c | 29 ++++++++++++++++++++---- > drivers/i2c/busses/i2c-octeon-core.h | 17 ++++++++++++++ > drivers/i2c/busses/i2c-thunderx-pcidrv.c | 7 ++++++ > 4 files changed, 50 insertions(+), 4 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 960512bec42885c0f1632a7c90851c3d32fbf20e..92b0a55c36e41cf54c7cbf52576d5424b591aa31 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4725,6 +4725,7 @@ F: drivers/net/wireless/ath/carl9170/ > > CAVIUM I2C DRIVER > M: Robert Richter <rric@xxxxxxxxxx> > +M: Suneel Garapati <sgarapati@xxxxxxxxxxx> Suneel doesn't have much of a history here, though. Can I have an ack from Robert? In any case, can you please put this change outside from the series as it would take a different path. Thanks, Andi
