On Tue, Dec 12, 2023 at 04:23:47PM +0100, Gatien Chevallier wrote: > Document ETZPC (Extended TrustZone protection controller). ETZPC is a > firewall controller. > > Signed-off-by: Gatien Chevallier <gatien.chevallier@xxxxxxxxxxx> > --- > > Changes in V6: > - Renamed access-controller to access-controllers > - Removal of access-control-provider property > - Removal of access-controller and access-controller-names > declaration in the patternProperties field. Add > additionalProperties: true in this field. > > Changes in V5: > - Renamed feature-domain* to access-control* > > Changes in V2: > - Corrected errors highlighted by Rob's robot > - No longer define the maxItems for the "feature-domains" > property > - Fix example (node name, status) > - Declare "feature-domain-names" as an optional > property for child nodes > - Fix description of "feature-domains" property > - Reordered the properties so it matches ETZPC > - Add missing "feature-domain-controller" property > > .../bindings/bus/st,stm32-etzpc.yaml | 87 +++++++++++++++++++ > 1 file changed, 87 insertions(+) > create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml > > diff --git a/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml > new file mode 100644 > index 000000000000..9ca0ad39bc19 > --- /dev/null > +++ b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml > @@ -0,0 +1,87 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STM32 Extended TrustZone protection controller > + > +description: | > + The ETZPC configures TrustZone security in a SoC having bus masters and > + devices with programmable-security attributes (securable resources). > + > +maintainers: > + - Gatien Chevallier <gatien.chevallier@xxxxxxxxxxx> > + > +properties: > + compatible: > + contains: > + const: st,stm32-etzpc Same here, needs 'simple-bus'. > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + ranges: true > + > + "#access-controller-cells": > + const: 1 > + description: > + Contains the firewall ID associated to the peripheral. > + > +patternProperties: > + "^.*@[0-9a-f]+$": > + description: Peripherals > + type: object > + > + additionalProperties: true > + > + required: > + - access-controllers > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - "#access-controller-cells" > + - ranges > + > +additionalProperties: false > + > +examples: > + - | > + // In this example, the usart2 device refers to rifsc as its access > + // controller. Looks like the comment is wrong. > + // Access rights are verified before creating devices. > + > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/stm32mp13-clks.h> > + #include <dt-bindings/reset/stm32mp13-resets.h> > + > + etzpc: bus@5c007000 { > + compatible = "st,stm32-etzpc"; > + reg = <0x5c007000 0x400>; > + #address-cells = <1>; > + #size-cells = <1>; > + #access-controller-cells = <1>; > + ranges; > + > + usart2: serial@4c001000 { > + compatible = "st,stm32h7-uart"; > + reg = <0x4c001000 0x400>; > + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&rcc USART2_K>; > + resets = <&rcc USART2_R>; > + wakeup-source; > + dmas = <&dmamux1 43 0x400 0x5>, > + <&dmamux1 44 0x400 0x1>; > + dma-names = "rx", "tx"; > + access-controllers = <&etzpc 17>; > + }; > + }; > -- > 2.25.1 >
