Hi Andy,
> On 3 Sep 2023, at 14.46, Andi Shyti <andi.shyti@xxxxxxxxxx> wrote:
>
> Hi Pierre-Yves, Alain,
>
> mind taking a look here?
>
> [...]
>
>> @@ -357,6 +357,7 @@ struct stm32f7_i2c_dev {
>> u32 dnf_dt;
>> u32 dnf;
>> struct stm32f7_i2c_alert *alert;
>> + bool atomic;
>
> this smells a bit racy here, this works only if the xfer's are
> always sequential.
>
> What happens when we receive at the same time two xfer's, one
> atomic and one non atomic?
>From the include/i2c.h:
* @master_xfer_atomic: same as @master_xfer. Yet, only using atomic context
* so e.g. PMICs can be accessed very late before shutdown. Optional.
So it’s only used very late in the shutdown.
It’s implemented the same way as in:
drivers/i2c/busses/i2c-imx.c
drivers/i2c/busses/i2c-meson.c
drivers/i2c/busses/i2c-mv64xxx.c
drivers/i2c/busses/i2c-tegra.c
… etc…
In drivers/i2c/i2c-core.h it’s determined whether it’s atomic transfer or not:
/*
* We only allow atomic transfers for very late communication, e.g. to access a
* PMIC when powering down. Atomic transfers are a corner case and not for
* generic use!
*/
static inline bool i2c_in_atomic_xfer_mode(void)
{
return system_state > SYSTEM_RUNNING && irqs_disabled();
}
So you would not have an atomic transfer and later an non atomic.
/Sean
