On Fri, 12 May 2023 14:50:00 +0300, Jarkko Nikula wrote:
> Add SMBus PCI ID on Intel Meteor Lake SoC-S South.
>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx>
> ---
> v3: Call this explicitly as Meteor Lake SoC-S SMBus controller for
> distinguish from Meteor Lake PCH-S SMBus controller in patch 3/3.
> v2: Keep PCI ID define list sorted and define
> PCI_DEVICE_ID_INTEL_METEOR_LAKE_S_SMBUS in correct place.
> ---
> drivers/i2c/busses/i2c-i801.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index 7431e8411e99..bc2576188e0a 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -77,6 +77,7 @@
> * Alder Lake-M (PCH) 0x54a3 32 hard yes yes yes
> * Raptor Lake-S (PCH) 0x7a23 32 hard yes yes yes
> * Meteor Lake-P (SOC) 0x7e22 32 hard yes yes yes
> + * Meteor Lake SoC-S (SOC) 0xae22 32 hard yes yes yes
> *
> * Features supported by this driver:
> * Software PEC no
> @@ -250,6 +251,7 @@
> #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3
> #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323
> #define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3
> +#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_SOC_S_SMBUS 0xae22
>
> struct i801_mux_config {
> char *gpio_chip;
> @@ -1038,6 +1040,7 @@ static const struct pci_device_id i801_ids[] = {
> { PCI_DEVICE_DATA(INTEL, ALDER_LAKE_M_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { PCI_DEVICE_DATA(INTEL, RAPTOR_LAKE_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> + { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_SOC_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { 0, }
> };
>
Reviewed-by: Jean Delvare <jdelvare@xxxxxxx>
--
Jean Delvare
SUSE L3 Support
