On Tue, Jan 17, 2023 at 05:58:01PM +0530, Shyam Sundar S K wrote: > On some AMD platforms, based on the new designware datasheet, > BIOS sets the BIT(11) within the IC_CON register to advertise > the "bus clear feature capability". > > AMD/Designware datasheet says: > > Bit(11) BUS_CLEAR_FEATURE_CTRL. Read-write,Volatile. Reset: 0. > Description: In Master mode: > - 1'b1: Bus Clear Feature is enabled. > - 1'b0: Bus Clear Feature is Disabled. > In Slave mode, this register bit is not applicable. > > On AMD platform designs: > 1. BIOS programs the BUS_CLEAR_FEATURE_CTRL and enables the detection > of SCL/SDA stuck low. > 2. Whenever the stuck low is detected, the SMU FW shall do the bus > recovery procedure. > > Currently, the way in which the "master_cfg" is built in the driver, it > overrides the BUS_CLEAR_FEATURE_CTRL advertised by BIOS and the SMU FW > cannot initiate the bus recovery if the stuck low is detected. > > Hence add a check in i2c_dw_configure_master() that if the BIOS > advertises the bus clear feature, let driver not ignore it and > adapt accordingly. ... > + ic_con = ioread32(dev->base + DW_IC_CON); Any particular reason why regmap_read() can't be used? -- With Best Regards, Andy Shevchenko
