On Thu, Jun 30, 2022 at 10:41:54AM +0300, Jarkko Nikula wrote:
> Add SMBus PCI ID on Intel Meteor Lake-P.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx>
> ---
> v2. Meteor Lake-P doesn't have a PCH die but integrates the
> functionality into a SoC. Change commit log and patch diff accordingly.
> Thanks to Andy Shevchenko for noticing this in an another patch.
> ---
> Documentation/i2c/busses/i2c-i801.rst | 1 +
> drivers/i2c/busses/Kconfig | 1 +
> drivers/i2c/busses/i2c-i801.c | 3 +++
> 3 files changed, 5 insertions(+)
>
> diff --git a/Documentation/i2c/busses/i2c-i801.rst b/Documentation/i2c/busses/i2c-i801.rst
> index cad59170b2ad..ab9e850e8fe0 100644
> --- a/Documentation/i2c/busses/i2c-i801.rst
> +++ b/Documentation/i2c/busses/i2c-i801.rst
> @@ -46,6 +46,7 @@ Supported adapters:
> * Intel Emmitsburg (PCH)
> * Intel Alder Lake (PCH)
> * Intel Raptor Lake (PCH)
> + * Intel Meteor Lake (SOC)
>
> Datasheets: Publicly available at the Intel website
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index b1d7069dd377..3f6d03073079 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -156,6 +156,7 @@ config I2C_I801
> Emmitsburg (PCH)
> Alder Lake (PCH)
> Raptor Lake (PCH)
> + Meteor Lake (SOC)
>
> This driver can also be built as a module. If so, the module
> will be called i2c-i801.
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index ff706349bdfb..9e5b87e107ba 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -76,6 +76,7 @@
> * Alder Lake-P (PCH) 0x51a3 32 hard yes yes yes
> * Alder Lake-M (PCH) 0x54a3 32 hard yes yes yes
> * Raptor Lake-S (PCH) 0x7a23 32 hard yes yes yes
> + * Meteor Lake-P (SOC) 0x7e22 32 hard yes yes yes
> *
> * Features supported by this driver:
> * Software PEC no
> @@ -231,6 +232,7 @@
> #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
> #define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_S_SMBUS 0x7a23
> #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3
> +#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_P_SMBUS 0x7e22
> #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
> #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2
> #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22
> @@ -1049,6 +1051,7 @@ static const struct pci_device_id i801_ids[] = {
> { PCI_DEVICE_DATA(INTEL, ALDER_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { PCI_DEVICE_DATA(INTEL, ALDER_LAKE_M_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { PCI_DEVICE_DATA(INTEL, RAPTOR_LAKE_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> + { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
> { 0, }
> };
>
> --
> 2.35.1
>
--
With Best Regards,
Andy Shevchenko
