W dniu 26.06.2021 o 12:27, Raviteja Narayanam pisze:
Xilinx I2C IP has two modes of operation, both of which implement I2C transactions. The only difference from sw perspective is the programming sequence for these modes. Dynamic mode -> Simple to program, less number of steps in sequence. Standard mode -> Gives flexibility, more number of steps in sequence. In dynamic mode, during the i2c-read transactions, if there is a delay(> 200us) between the register writes (address & byte count), read transaction fails. On a system with load, this scenario is occurring frequently. To avoid this, switch to standard mode if there is a read request. Added a quirk to identify the IP version effected by this and follow the standard mode. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xxxxxxxxxx>
[...] If those two modes only differ in software complexity but we are not able to support only the simpler one and we have support for the more complicated (standard mode) anyways, we know that standard mode can handle or the cases while dynamic mode cannot, we also know that dynamic mode is broken on some versions of the core, why do we actually keep support for dynamic mode? Krzysztof
