On Sat, Apr 09, 2022 at 05:43:34PM +0100, Lucas Tanure wrote: > The duty cycle of 33% is less than the required > by the I2C specs for the LOW period of the SCL > clock. > > Move the duty cyle to 50% for 100Khz or lower > clocks, and (40% High SCL / 60% Low SCL) duty > cycle for clocks above 100Khz. > > Signed-off-by: Lucas Tanure <tanure@xxxxxxxxx> Applied to for-next, thanks!
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