On Mon, Mar 14, 2022 at 11:13:37AM +0100, Uwe Kleine-König wrote: > Hello, > > On Mon, Mar 14, 2022 at 10:59:18AM +0100, Ian Dannapel wrote: > > diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c > > index 3576b63a6c03..019dda5301df 100644 > > --- a/drivers/i2c/busses/i2c-imx.c > > +++ b/drivers/i2c/busses/i2c-imx.c > > @@ -602,12 +602,6 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx, bool atomic) > > imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); > > imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR); > > > > - /* Wait controller to be stable */ > > - if (atomic) > > - udelay(50); > > - else > > - usleep_range(50, 150); > > - > > /* Start I2C transaction */ > > temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); > > temp |= I2CR_MSTA; > > This contradicts statements made in > 43309f3b521302bb66c4c9e66704dd3675e4d725. > > Maybe the sleep/delay should be done conditionally on the busy bit? Maybe. I do not see what exact problem is this sleep addressing. How exact the can get stable? Is it addressing some clock issue or wading until something happening on the bus? Regards, Oleskij -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
