On Wed, 09 Feb 2022 11:27:08 -0600, Terry Bowman wrote: > This series changes the piix4_smbus driver's cd6h/cd7h port I/O accesses > to use MMIO instead. This is necessary because cd6h/cd7h port I/O may be > disabled on later AMD processors. > > This series includes patches with MMIO accesses to register > FCH::PM::DECODEEN. The same register is also accessed by the sp5100_tco > driver.[1] Synchronization to the MMIO register is required in both > drivers. > (...) Except for the curly brace issue in patch 3, all looks good, so I confirm my Reviewed-by: Jean Delvare <jdelvare@xxxxxxx> Tested-by: Jean Delvare <jdelvare@xxxxxxx> on all i2c-piix4 patches. Thanks, -- Jean Delvare SUSE L3 Support
