Hi Terry, On Sun, 30 Jan 2022 12:41:29 -0600, Terry Bowman wrote: > AMD processors include registers capable of selecting between 2 SMBus > ports. Port selection is made during each user access by writing to > FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during > SMBus port selection because cd6h/cd7h port I/O is not available on > later AMD processors. > > Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx> > --- > drivers/i2c/busses/i2c-piix4.c | 16 +++++++++++++--- > 1 file changed, 13 insertions(+), 3 deletions(-) > > (...) > @@ -765,6 +774,7 @@ static int piix4_sb800_port_sel(u8 port) > > return (smba_en_lo & piix4_port_mask_sb800); > } > + > /* > * Handles access to multiple SMBus ports on the SB800. > * The port is selected by bits 2:1 of the smb_en register (0x2c). We indeed want a blank line here, but it should be inserted in patch [5/9] (which adds function piix4_sb800_port_sel), not in this patch. -- Jean Delvare SUSE L3 Support
