On Thu, 13 Jan 2022 12:24:41 +0200, Andy Shevchenko wrote: > On Thu, Jan 13, 2022 at 9:42 AM Wolfram Sang <wsa@xxxxxxxxxx> wrote: > > > > On top of that I'm wondering why slow I/O is used? Do we have anything > > > > that really needs that or is it simply a cargo-cult? > > > > > > The efch SMBUS & WDT previously only supported a port I/O interface > > > (until recently) and thus dictated the HW access method. > > > > Is this enough information to start v2 of this series? Or does the > > approach need more discussion? > > I dunno why slow I/O is chosen, but it only affects design (read: > ugliness) of the new code. I've been wondering about the use of slow (*_p) I/O accessors for some time too. All the SMBus controller drivers doing that originate from the lm_sensors project (i2c-ali1535, i2c-ali1563, i2c-ali15x3, i2c-amd756, i2c-i801, i2c-nforce2, i2c-piix4 and i2c-viapro). So basically *all* SMBus controller drivers for non-embedded x86. I suspect that most of this is the result of copy-and-paste from one driver to the next as support for different chipsets was added in the late 90's and early 2000's. I wouldn't be surprised if most, if not all, can be replaced with non-pausing counterparts. But I've been too shy to give it a try so far. I must say I find it pretty funny that Andy is asking about it in the i2c-piix4 driver when the i2c-i801 driver, which he's been helping with quite a lot in the last few years, does exactly the same. -- Jean Delvare SUSE L3 Support
