On Tue, Feb 11, 2020 at 08:47:04AM -0600, Gustavo A. R. Silva wrote: > Factor out 100 from the equation and do 32-bit arithmetic (3 * clk_mhz / 10) > instead of 64-bit. > > Notice that clk_mhz is MHz, so the multiplication will never wrap 32 bits > and there is no need for div_u64(). Was there ever? With u32 clk_mhz = clk_get_rate(idev->i2c_clk) / 1000000; a later multiplication with 300 should not wrap u32? > /* SDA Hold Time, 300ns */ > - writel(div_u64(300 * clk_mhz, 1000), idev->base + ALTR_I2C_SDA_HOLD); > + writel(3 * clk_mhz / 10, idev->base + ALTR_I2C_SDA_HOLD); The change itself is OK, yet I wonder about the comment above: 'clk_mhz * 0.3' will not give a constant 300ns, or?
Attachment:
signature.asc
Description: PGP signature
