On Thu, Dec 19, 2019 at 12:51:38PM +0100, Khouloud Touil wrote:
> Several memories have a write-protect pin, that when pulled high, it
> blocks the write operation.
Subject doesn't match the actual property name.
>
> On some boards, this pin is connected to a GPIO and pulled high by
> default, which forces the user to manually change its state before
> writing.
>
> Instead of modifying all the memory drivers to check this pin, make
> the NVMEM subsystem check if the write-protect GPIO being passed
> through the nvmem_config or defined in the device tree and pull it
> low whenever writing to the memory.
>
> Add a new optional property to the device tree binding document, which
> allows to specify the GPIO line to which the write-protect pin is
> connected.
>
> Signed-off-by: Khouloud Touil <ktouil@xxxxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> index 1c75a059206c..b43c6c65294e 100644
> --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> @@ -34,6 +34,14 @@ properties:
> description:
> Mark the provider as read only.
>
> + wp-gpios:
> + description:
> + GPIO to which the write-protect pin of the chip is connected.
> + The write-protect GPIO is asserted, when it's driven high
> + (logical '1') to block the write operation. It's deasserted,
> + when it's driven low (logical '0') to allow writing.
> + maxItems: 1
> +
> patternProperties:
> "^.*@[0-9a-f]+$":
> type: object
> @@ -63,9 +71,12 @@ patternProperties:
>
> examples:
> - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> qfprom: eeprom@700000 {
> #address-cells = <1>;
> #size-cells = <1>;
> + wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
>
> /* ... */
>
> --
> 2.17.1
>
