On Wed, Jan 30, 2019 at 10:16:24PM -0800, Sowjanya Komatineni wrote: > Bus clear feature of tegra i2c controller helps to recover from > bus hang when i2c master loses the bus arbitration due to the > slave device holding SDA LOW continuously for some unknown reasons. > > Per I2C specification, the device that held the bus LOW should > release it within 9 clock pulses. > > During bus clear operation, Tegra I2C controller sends 9 clock > pulses and terminates the transaction with STOP condition. > Upon successful bus clear operation, bus goes to idle state and > driver retries the transaction. > > Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx> > --- > [V5/V6/V7/V8]: Same as V4 > [V4]: Added I2C Bus Clear support patch to this version of series. > > drivers/i2c/busses/i2c-tegra.c | 71 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 71 insertions(+) See my comments on v7, with that: Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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