TQ-Systems incorporates an ocores I2C bus master into there IO controller for x86 systems. The registers are Intel IO mapped, and the interrupt line is not tied to the CPU, so needs to be polled. The bus can also be clocked at higher speed than the i2c default, so the requested speed needs to be passed in the platform data. v2: Rebased on 5.0-rc1 Andrew Lunn (3): i2c: ocores: Add support for IO mapper registers. i2c: ocores: Add support for bus clock via platform data i2c: ocores: Add support for polling interrupt status drivers/i2c/busses/i2c-ocores.c | 101 +++++++++++++++++++---- include/linux/platform_data/i2c-ocores.h | 1 + 2 files changed, 85 insertions(+), 17 deletions(-) -- 2.20.1
