On Mon, Dec 10, 2018 at 03:01:27PM +0000, Adamski, Krzysztof (Nokia - PL/Wroclaw) wrote: > It was observed that when using seqentional mode contrary to the > documentation, the SS bit (which is supposed to only be set if > automatic/sequence command completed normally), is sometimes set > together with NA (NAK in address phase) causing transfer to falsely be > considered successful. > > My assumption is that this does not happen during manual mode since the > controller is stopping its work the moment it sets NA/ND bit in status > register. This is not the case in Automatic/Sequentional mode where it > is still working to send STOP condition and the actual status we get > depends on the time when the ISR is run. > > This patch changes the order of checking status bits in ISR - error > conditions are checked first and only if none of them occurred, the > transfer may be considered successful. This is required to introduce > using of sequentional mode in next patch. > > Signed-off-by: Krzysztof Adamski <krzysztof.adamski@xxxxxxxxx> Applied to for-next, thanks!
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