Re: [PATCH v3 3/4] i2c: qup: Correct duty cycle for FM and FM+

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On Thu, May 10, 2018 at 10:13:56AM -0600, Austin Christ wrote:
> The I2C spec UM10204 Rev. 6 specifies the following timings.
> 
>            Standard      Fast Mode     Fast Mode Plus
> SCL low    4.7us         1.3us         0.5us
> SCL high   4.0us         0.6us         0.26us
> 
> This results in a 33%/66% duty cycle as opposed to the 50%/50% duty cycle
> used for Standard-mode.
> 
> Add High Time Divider settings to correct duty cycle for FM(400kHz) and
> FM+(1MHz).
> 
> Signed-off-by: Austin Christ <austinwc@xxxxxxxxxxxxxx>
> Reviewed-by: Sricharan R <sricharan@xxxxxxxxxxxxxx>
> ---

Looks good to me.

Reviewed-by: Andy Gross <andy.gross@xxxxxxxxxx>



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