On 17/05/2018 18:32, Wolfram Sang wrote:
CCing the people involved in this commit...
On Thu, May 17, 2018 at 06:16:41PM +0100, Will Wagner wrote:
Hello,
I have a Fujitsu DS3313-S6 mainboard with a GX-424CC apu on it (http://www.fujitsu.com/fts/products/computing/peripheral/mainboards/industrial-mainboards/d3313s.html).
It identifies as having PCI device 0x1022:780b which is
PCI_DEVICE_ID_AMD_HUDSON2_SMBUS
The i2c-piix4.c driver was broken for me by commit 6befa3fde65f i2c: piix4:
Support alternative port selection register
In that commit it added support for accessing the SMBus from either 0x2c or
alternatively 0x2e. The commit log comment says that the alternative
register is the only method supported for the Hudson2 chipset and so in the
code if the PCIe vendorId is AMD it is hard coded to use the alternative
register.
Use of this alternative register on my board produces random locks and i2c
transaction errors. If I instead change the code so that it reads
Smbus0SelEn (0x2f.) to decide how to access it then it decides on Smbus0En
(0x2c) and everything works again great.
There is no justification in the commit message for why only the alternative
is supported for Hudson2. I have tried looking in the AMD documentation,
unfortunately the BKDG for family 16h models 30h-3Fh doesn't seem to
document any of these registers (whereas it is covered in the SB800
reference guide).
Having looked at this some more I believe that HUDSON2 needs the same
fix as was applied to KERNCZ in 0fe16195f891 i2c: piix4: Fix SMBus port
selection for AMD Family 17h chips
If I look at the BKDG for Hudson2 it uses the same PMx register 0x02 as
well. I believe the following change fixes the issue:
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 174579d32e5f..285531bbf313 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -359,19 +359,9 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
/* Find which register is used for port selection */
if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD) {
- switch (PIIX4_dev->device) {
- case PCI_DEVICE_ID_AMD_KERNCZ_SMBUS:
- piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ;
- piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ;
- piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ;
- break;
- case PCI_DEVICE_ID_AMD_HUDSON2_SMBUS:
- default:
- piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT;
- piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
- piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
- break;
- }
+ piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ;
+ piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ;
+ piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ;
} else {
mutex_lock(&piix4_mutex_sb800);
outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX);
--
2.11.0
--
------------------------------------------------------------------------
Will Wagner will_wagner@xxxxxxxxxxxx
Engineering Manager Office Tel: +44 (0)20 7471 9424
Carallon Ltd, International House, 7 High Street, Ealing, London W5 5DB
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