Re: [PATCH 0/3] i2c: designware: should not wait for enable

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Mon, Apr 23, 2018 at 11:03 AM, Alexander Monakov <amonakov@xxxxxxxxx> wrote:
> On Mon, 23 Apr 2018, Ben Gardner wrote:
>> I think we need to be smarter about which boards have the
>> IC_ENABLE_STATUS register, but I don't know enough about the various
>> supported Designware I2C controller implementations to suggest an
>> approach.
>
> We can assume that 1.1.5 (the IP rev. in your Atom) and newer have it,
> if we don't find a better solution.
>
> Does changing __i2c_dw_enable to __i2c_dw_enable_and_wait in i2c_dw_xfer
> on its own fix the problem for you?

No. That change did not fix it.

> If that works, I think a possible solution might be to always poll on
> disabling as recommended by docs, but do it asynchronously to avoid the
> slowdown that prompted the elision we have now. Although in that case
> I'm not sure why current code leads to a failure, as i2c_dw_xfer_init
> performs the polling anyway.
>
> Can you add printks in dw_readl/dw_writel and maybe a few extra printks
> in their callers to see what accesses are being made, and share the
> resulting trace?

Sure. The log is below. I filtered out the logs from other buses and
removed repetitive messages.

> What are the devices being accessed on the i2c bus in your case?

On bus 18.3, there is a TMP75C (temperature sensor) and a M24C02 EEPROM.
I should note that I also have one I2C device (RTC) on bus 18.2, but
that never has had issues.

[    0.227955] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_readl(0xfc) => 0x44570140
[    0.227960] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_readl(0xf4) => 0x00ffffee
[    0.227963] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.227967] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000000
[    0.227970] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_writel(0x14, 0x00000200)
[    0.227973] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_writel(0x18, 0x00000200)
[    0.227976] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_writel(0x1c, 0x00000055)
[    0.227979] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_writel(0x20, 0x00000099)
[    0.227982] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_readl(0xf8) => 0x3131352a
[    0.227985] i2c-designware-pci 0000:00:18.3: COMP_VERISON: 0x3131352a
[    0.227987] i2c-designware-pci 0000:00:18.3: i2c_dw_init_master:
dw_writel(0x7c, 0x00010006)
[    0.227990] i2c-designware-pci 0000:00:18.3:
i2c_dw_configure_fifo_master: dw_writel(0x3c, 0x00000010)
[    0.227993] i2c-designware-pci 0000:00:18.3:
i2c_dw_configure_fifo_master: dw_writel(0x38, 0x00000000)
[    0.227996] i2c-designware-pci 0000:00:18.3:
i2c_dw_configure_fifo_master: dw_writel(0x0, 0x00000065)
[    0.227999] i2c-designware-pci 0000:00:18.3: i2c_dw_disable_int:
dw_writel(0x30, 0x00000000)
[    0.229223] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer: msgs: 2
[    0.229228] i2c-designware-pci 0000:00:18.3:
i2c_dw_wait_bus_not_busy: dw_readl(0x70) => 0x00000006
[    0.229231] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.229234] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000000
[    0.229239] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_readl(0x0) => 0x00000065
[    0.229242] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x0, 0x00000065)
[    0.229245] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x4, 0x00000057)
[    0.229248] i2c-designware-pci 0000:00:18.3: i2c_dw_disable_int:
dw_writel(0x30, 0x00000000)
[    0.229251] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000001)
[    0.229254] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_readl(0x40) => 0x00000000
[    0.229257] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x30, 0x00000254)
[    0.229336] i2c-designware-pci 0000:00:18.3: i2c_dw_isr:
dw_readl(0x6c) => 0x00000001
[    0.229340] i2c-designware-pci 0000:00:18.3: i2c_dw_isr:
dw_readl(0x34) => 0x00000210
[    0.229343] i2c-designware-pci 0000:00:18.3:
i2c_dw_read_clear_intrbits: dw_readl(0x2c) => 0x00000210
[    0.229347] i2c-designware-pci 0000:00:18.3:
i2c_dw_read_clear_intrbits: dw_readl(0x60) => 0x00000001
[    0.229350] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x74) => 0x00000000
[    0.229353] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x78) => 0x00000000
[    0.229356] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x10, 0x00000000)
[    0.229359] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x74) => 0x00000001
[    0.229362] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x78) => 0x00000000
[    0.229365] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x10, 0x00000700)
[    0.229368] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x30, 0x00000244)
[    0.229435] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.229439] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000001
[    0.229701] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.229705] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000000
[    0.233943] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer: msgs: 2
[    0.233948] i2c-designware-pci 0000:00:18.3:
i2c_dw_wait_bus_not_busy: dw_readl(0x70) => 0x00000006
[    0.233952] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.233955] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000000
[    0.233960] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_readl(0x0) => 0x00000065
[    0.233963] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x0, 0x00000065)
[    0.233966] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x4, 0x00000048)
[    0.233969] i2c-designware-pci 0000:00:18.3: i2c_dw_disable_int:
dw_writel(0x30, 0x00000000)
[    0.233972] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000001)
[    0.233975] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_readl(0x40) => 0x00000000
[    0.233978] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_init:
dw_writel(0x30, 0x00000254)
[    0.233990] i2c-designware-pci 0000:00:18.3: i2c_dw_isr:
dw_readl(0x6c) => 0x00000001
[    0.233994] i2c-designware-pci 0000:00:18.3: i2c_dw_isr:
dw_readl(0x34) => 0x00000210
[    0.233997] i2c-designware-pci 0000:00:18.3:
i2c_dw_read_clear_intrbits: dw_readl(0x2c) => 0x00000210
[    0.234001] i2c-designware-pci 0000:00:18.3:
i2c_dw_read_clear_intrbits: dw_readl(0x60) => 0x00000001
[    0.234005] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x74) => 0x00000000
[    0.234008] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x78) => 0x00000000
[    0.234011] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x10, 0x00000001)
[    0.234015] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x74) => 0x00000001
[    0.234018] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_readl(0x78) => 0x00000000
[    0.234021] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x10, 0x00000700)
[    0.234024] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer_msg:
dw_writel(0x30, 0x00000244)
[    0.234035] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.234039] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000001
[    0.234301] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.234304] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000001

( removed repeated messages )

[    0.259875] i2c-designware-pci 0000:00:18.3: __i2c_dw_enable:
dw_writel(0x6c, 0x00000000)
[    0.259879] i2c-designware-pci 0000:00:18.3:
__i2c_dw_enable_and_wait: dw_readl(0x9c) => 0x00000001
[    0.260143] i2c-designware-pci 0000:00:18.3: timeout in disabling adapter
[    0.260147] i2c-designware-pci 0000:00:18.3: i2c_dw_xfer: msgs: 1
[    0.260151] i2c-designware-pci 0000:00:18.3:
i2c_dw_wait_bus_not_busy: dw_readl(0x70) => 0x00000027
[    0.261266] i2c-designware-pci 0000:00:18.3:
i2c_dw_wait_bus_not_busy: dw_readl(0x70) => 0x00000027

( removed repeated messages )

[    0.288501] i2c-designware-pci 0000:00:18.3:
i2c_dw_wait_bus_not_busy: dw_readl(0x70) => 0x00000027
[    0.288505] i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready



[Index of Archives]     [Linux GPIO]     [Linux SPI]     [Linux Hardward Monitoring]     [LM Sensors]     [Linux USB Devel]     [Linux Media]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux