Hi All, While debugging some i2c issues on Asus T100TA devices (without finding a solution unfortunately) I found this: https://github.com/RTEMS/rtems/blob/master/c/src/lib/libbsp/arm/altera-cyclone-v/hwlib/src/hwmgr/alt_i2c.c Which is code for driving the i2c-designware controller in an altera-cyclone: https://www.altera.com/hps/cyclone-v/index.html#topic/sfo1410069826944.html The interesting bit is this: // Default spike suppression limit during standard speed #define ALT_I2C_SS_DEFAULT_SPKLEN 11 // Default spike suppression limit during fast speed #define ALT_I2C_FS_DEFAULT_SPKLEN 4 At least the i2c-designware controller in Intel Bay- and Cherry-Trail SoCs also has the ic_fs_spklen register, and it defaults to 5, which is good for 400 kHz, but at least the altera code suggest that 11 is a better value for 100 kHz operation, so I think that we should modify the Linux driver to set ic_fs_spklen to 11 when running at 100 KHz. Assuming you agree with that, the question becomes, how can we detect if the hardware has this register? the i2c-designware-master.c code checks DW_IC_COMP_VERSION > DW_IC_SDA_HOLD_MIN_VERS to see if the sda_hold register is there, can we do something similar for ic_fs_spklen ? Regards, Hans
