Hi, looks mostly good. I just found this comment which needs clarification: > + /* > + * All upper layers currently are never use transfer with more than > + * 2 messages. Have you really checked ALL of the upper layers? And even if so, there is the dev-interface to userspace which allows for arbitrary I2C transfers using I2C_RDWR. > Actually, it's also not so relevant in Mellanox systems > + * because of HW limitation. What kind of HW limitation do you mean here? Can Mellanox send more than two messages? > Max size of transfer is o more than 20B "is o more"? Typo? > + * in current x86 LPCI2C bridge. What does that mean in result? Regards, Wolfram
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