On Tue, Oct 11, 2016 at 01:13:27PM +0200, Jean Delvare wrote: > Starting with the 8-Series/C220 PCH (Lynx Point), the SMBus > controller includes a SPD EEPROM protection mechanism. Once the SPD > Write Disable bit is set, only reads are allowed to slave addresses > 0x50-0x57. > > However the legacy implementation of I2C Block Read since the ICH5 > looks like a write, and is therefore blocked by the SPD protection > mechanism. This causes the eeprom and at24 drivers to fail. > > So assume that I2C Block Read is implemented as an actual read on > these chipsets. I tested it on my Q87 chipset and it seems to work > just fine. > > Signed-off-by: Jean Delvare <jdelvare@xxxxxxx> > Cc: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx> > Cc: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> > Cc: Wolfram Sang <wsa@xxxxxxxxxxxxx> Fixed the BIT() issue mentioned by Jarkko and applied to for-current, thanks! But please double check my commit once I pushed out.
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