On Sat, 2016-08-27 at 15:39 +0800, Zhuo-hao Lee wrote:
> There are several ways to set the SDA hold time for i2c controller,
> including: Device Tree, built-in device properties and ACPI. However,
> if the SDA hold time is not specified by above method, we should
> read the value, where it is preset by firmware, and save it to
> sda_hold_time. This is needed because when i2c controller enters
> runtime suspend, the DW_IC_SDA_HOLD value will be reset to chipset
> default value. And during runtime resume, i2c_dw_init will be called
> to reconfigure i2c controller. If sda_hold_time is zero, the chipset
> default hold time will be used, that will be too short for some
> platforms. Therefore, to have a better tolerance, the DW_IC_SDA_HOLD
> value should be kept by sda_hold_time.
Looks good to me.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
>
> Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@xxxxxxxxx>
> ---
> drivers/i2c/busses/i2c-designware-core.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.c
> b/drivers/i2c/busses/i2c-designware-core.c
> index c6922b8..fcd973d 100644
> --- a/drivers/i2c/busses/i2c-designware-core.c
> +++ b/drivers/i2c/busses/i2c-designware-core.c
> @@ -367,13 +367,17 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
> dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt,
> lcnt);
>
> /* Configure SDA Hold Time if required */
> - if (dev->sda_hold_time) {
> - reg = dw_readl(dev, DW_IC_COMP_VERSION);
> - if (reg >= DW_IC_SDA_HOLD_MIN_VERS)
> + reg = dw_readl(dev, DW_IC_COMP_VERSION);
> + if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
> + if (dev->sda_hold_time) {
> dw_writel(dev, dev->sda_hold_time,
> DW_IC_SDA_HOLD);
> - else
> - dev_warn(dev->dev,
> - "Hardware too old to adjust SDA hold
> time.");
> + } else {
> + /* Keep previous hold time setting if no one
> set it */
> + dev->sda_hold_time = dw_readl(dev,
> DW_IC_SDA_HOLD);
> + }
> + } else {
> + dev_warn(dev->dev,
> + "Hardware too old to adjust SDA hold
> time.\n");
> }
>
> /* Configure Tx/Rx FIFO threshold levels */
--
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy
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