On Mon, Nov 02, 2015 at 02:03:37AM +0000, Mans Rullgard wrote: > The BYTECNT register holds the transfer size minus one. Setting it > to the correct value requires a dummy read/write only for zero-length > transfers as it is impossible to request one from the hardware. If a > zero-length transfer is requested, changing the length to 1 and setting > "buf" to a dummy location allows making the main loops less convoluted. > > In other words, this patch makes the driver transfer the number of bytes > requested unless this is zero, which is not supported by the hardware, > in which case one byte is transferred instead. Uh, this is wrong, zero byte should really not transfer anything. We need to fix that and bail out, so probably something like if (!len) return -EOPNOTSUPP; Also, the xlr_func() should mask out I2C_FUNC_SMBUS_QUICK. Other than that, the patch looks good to me. Out of curiosity, your first driver had the registers 32bit apart. Now you can deal with 8bit. Is this configurable on this SoC? Thanks, Wolfram
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