On 14/08/15 16:50, Sifan Naeem wrote:
> Stop Detected interrupt is triggered when a Stop bit is detected on
> the bus, which indicates the end of the current transfer.
>
> When the end of a transfer is indicated by the Stop Detected interrupt,
> drain the FIFO and signal completion for the transaction. But if the
> interrupt was triggered before all data is written to the fifo or with
> more data expected return error with transfer complete signal.
>
> Halting the bus is no longer necessary after a stop bit is detected
> on the bus, as there cannot be a repeated start transfer when the stop
> bit has been issued, hence remove the transaction halt bit.
This patch looks okay, but does this paragraph still apply?
Cheers
James
>
> Signed-off-by: Sifan Naeem <sifan.naeem@xxxxxxxxxx>
> ---
> drivers/i2c/busses/i2c-img-scb.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c
> index 75a44e794d75..17e13ff475bb 100644
> --- a/drivers/i2c/busses/i2c-img-scb.c
> +++ b/drivers/i2c/busses/i2c-img-scb.c
> @@ -152,6 +152,7 @@
> #define INT_TRANSACTION_DONE BIT(15)
> #define INT_SLAVE_EVENT BIT(16)
> #define INT_TIMING BIT(18)
> +#define INT_STOP_DETECTED BIT(19)
>
> #define INT_FIFO_FULL_FILLING (INT_FIFO_FULL | INT_FIFO_FILLING)
>
> @@ -175,7 +176,8 @@
> INT_WRITE_ACK_ERR | \
> INT_FIFO_FULL | \
> INT_FIFO_FILLING | \
> - INT_FIFO_EMPTY)
> + INT_FIFO_EMPTY | \
> + INT_STOP_DETECTED)
>
> #define INT_ENABLE_MASK_WAITSTOP (INT_SLAVE_EVENT | \
> INT_ADDR_ACK_ERR | \
> @@ -873,6 +875,13 @@ static unsigned int img_i2c_auto(struct img_i2c *i2c,
>
> mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1));
>
> + if (int_status & INT_STOP_DETECTED) {
> + /* Drain remaining data in FIFO and complete transaction */
> + if (i2c->msg.flags & I2C_M_RD)
> + img_i2c_read_fifo(i2c);
> + return ISR_COMPLETE(0);
> + }
> +
> if (i2c->msg.flags & I2C_M_RD) {
> if (int_status & INT_FIFO_FULL_FILLING) {
> img_i2c_read_fifo(i2c);
>
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