> >>>The system issues an address transaction followed by a single byte > >>>read. > >> > >>This fits to my observation that the rcar driver cannot do SMBUS_QUICK > >>(e.g. via i2cdetect). I assumed that handling a length of 0 is broken. I > >>haven't had a deeper look yet, so I can't say much. So, you either go > >>for it yourself, or you wait until I posted my IIC enablement series for > >>Lager. Then, you can switch to the IIC core with the sh_mobile driver. > >>That one does SMBUS_QUICK correctly. > > > >I'll have a deeper look into this, I think there may be a solution. > > I've tried issuing the ESG + FSB bits as a command, however that > did not work. So, I experimented today as well. I don't think it is possible to have zero-length support. I'll cook up a patch to disable them. Come to think of it, it should be even for stable since I assume SMBUS_QUICK_WRITE will also put a byte on the bus. Not good! And I2C_M_NOSTART is also out of the question with this hardware.
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