> Subject: [PATCHv2 RESEND] i2c: designware-pci: set ideal HCNT, LCNT and SDA > hold time value > > From: Chew, Chiau Ee <chiau.ee.chew@xxxxxxxxx> > > On Intel BayTrail, there was case whereby the resulting fast mode bus speed > becomes slower (~20% slower compared to expected speed) if using the > HCNT/LCNT calculated in the core layer. Thus, this patch is added to allow pci > glue layer to pass in optimal HCNT/LCNT/SDA hold time values to core layer > since the core layer supports cofigurable HCNT/LCNT/SDA hold time values > now. > > Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@xxxxxxxxx> > --- > v2 changelog: > * Add 'dw_' prefix to struct scl_sda_cfg > * Add Baytrail HCNT/LCNT/SDA hold time values directly in the > struct instead of using macro definition > * Replace tab before "=" with space in struct > > drivers/i2c/busses/i2c-designware-pcidrv.c | 28 > ++++++++++++++++++++++++++++ > 1 files changed, 28 insertions(+), 0 deletions(-) > I have misplaced the changelog in the previous v2 patch which would cause the removal of signed-off-by line. I'm resending this to fix that problem. Sorry for any confusion and inconvenience caused. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
