On 09/24/2013 01:19 AM, Andrey Danin wrote:
> On Mon, Sep 23, 2013 at 8:36 PM, Stephen Warren <swarren@xxxxxxxxxxxxx
...
> I think you'd just have the following
>
> /* master */
> i2c@xxxxx {
> foo@0x40 {
> reg = <MASTER 0x40>;
> compatible = "nvidia,nvec";
> }
> };
>
> i2c@yyyy {
> foo@40 {
> reg = <SLAVE 0x40>;
> compatible = "nvidia,nvec-slave";
> }
> };
>
> There's no need for the slave child node to know that it is mastered
> from the Tegra I2C controller; all it cares about is that there is some
> I2C bus that it needs to respond to transactions upon.
>
> This binding describes only case, when I2C device are connected to I2C
> controller.
>
> Assume that I2C controller #1 (@xxxxx), I2C controller #2 (@yyyy), and
> nvec I2C master device are connected to same bus.
> How dt must be composed in this case ? Must i2c@xxxxx and i2c@yyyy be in
> parent/child relation (in terms of dt) ?
None of the I2C bindings currently allow one to specify that multiple of
the on-SoC controllers are connected to the same bus.
I'm not sure it's particularly useful to represent this anyway. Hardware
hooked up like this is pretty rare to start with (i.e. I know of no
board at all that's connected this way). I assume that if such HW did
exist, you'd simply assign each I2C slave to a particular I2C master,
and hence only put a DT node for it under a single DT master node.
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